How Ceragon accelerated development of an Ethernet over Radio (RoE) solution using a customized solution for adding the RF-header to their traffic generator.


Ceragon Networks Ltd. is a global innovator and leading solutions provider of end-to-end wireless connectivity, specializing in transport, access, and AI-powered managed & professional services. Through their commitment to excellence, they empower customers to elevate operational efficiency and enrich the quality of experience for their end users.

Figure 1: Ceragon engineer performing a test using the Teledyne LeCroy XenaManager software.

Ceragon delivers high-capacity wireless solutions for a wide range of communication network use cases. Their customers include service providers, utilities, public safety organizations, government agencies, energy companies, and more, who rely on Ceragon’s wireless expertise and cutting-edge solutions for 5G & 4G broadband wireless connectivity, mission-critical services, and an array of applications that harness their ultra-high reliability and speed. Ceragon solutions are deployed by more than 600 service providers, as well as more than 1,600 private network owners, in more than 130 countries.

Time to market for new products is crucial for Ceragon, and validation can be time-consuming, particularly when different subsystems are interdependent. Consequently, Ceragon was seeking ways to reduce inter-dependencies during the development phase. This case study outlines how Teledyne LeCroy supported Ceragon in cutting development time by removing inter-dependencies among system hardware so a new FPGA code could be tested in parallel with the development of the rest of the system.

The Challenge

Ceragon recently undertook the development of a Radio Head designed to transmit up to 25Gbps Ethernet traffic over a radio, as illustrated in Figure 1. This equipment consisted of a Network Processor (NP) and an FPGA. Within this framework, the NP appended a specialized 5-byte RF-header to Ethernet packets prior to their transmission to the FPGA. Subsequently, the FPGA handled various functions including policing, queuing, shaping, VLAN IDs, and other Layer2/3 related tasks..

To verify the functionality and performance of their Ethernet systems, Ceragon used Ethernet traffic generators including Teledyne’s Z10 Odin and Z100 Loki to generate wire speed Ethernet traffic flows with various packet sizes, VLAN ID’s and priorities. These traffic flows were then used to verify that the FPGA performs functions like policing, queueing, and shaping the traffic functioned correctly (see Figure 3).

Ideally, the various components of the entire system (NP, PCB, FPGA, software, etc.) should be developed and tested concurrently. This approach would substantially decrease the development time and guarantee that all components operate close to 100% as expected before undergoing final system integration. However, the verification of the different parts necessitates the completion of the full system, and these inter-dependencies impede the simultaneous verification of the components.

To reduce the inter-dependency of the FPGA development on the rest of the system, Ceragon wanted to use an evaluation board equipped with the FPGA and suitable external interfaces. However, the FPGA evaluation board did not include the NP, which meant the input to the FPGA lacked the necessary 5-byte RF-header. Additionally, off-the-shelf Traffic Generators did not support the unique RF-header. As a result, Ceragon’s FPGA developer was looking for a solution that would allow the chip design’s functionality to be tested with Ethernet traffic – including the RF-header – using the FPGA development board.

The Solution

During testing of the chip design using the FPGA evaluation board, Ceragon discovered that their test solutions did not support the incorporation of the 5-byte RF-header by default.

Discussing this challenge with the local Teledyne LeCroy Xena team led to them identifying a way of incorporating the 5-byte RF-header without having to develop a new feature.

This allowed the Ceragon FPGA developer to develop and test the FPGA code independently the rest of the system (see Figure 4).

Ceragon used a combination of Teledyne LeCroy Z10 Odin and Z100 Loki Ethernet traffic generators (see right).

The Z10 Odin has 6 ports that support Ethernet testing with data rates from 10Mbps to 10Gbps, while the 2-port Z100 Loki supports Ethernet testing 10Gbps to 100Gbps. The Z10 Odin and Z100 Loki test modules both fit in the Xena B2400 chassis. This Odin/Loki combination made it easy for Ceragon to test their multispeed ports from 1Gbps to 40Gbps using the same chassis.

The Odin and Loki traffic generators in the Xena Ethernet Test Platform are controlled using XenaManager, which is the main software application for configuring the ports and packet flows. The software includes templates for configuring and testing L2/L3 performance like the RFC-2544 benchmarking test suite, plus Xena OpenAutomation (XOA) which is a free open-source automation and scripting framework with an Python API that Ceragon used to add the Xena Traffic Generators to their own automation test environment.

By using the FPGA evaluation board and the software technique for adding the 5-byte RF-header, Ceragon was able to develop and verify the FPGA design independently from the development of the rest of the system. This considerably reduced the development time and project risk.

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