Loki-100G-5S-2P

The Loki-100G-5S-2P is a 2-port 100GE dual-media test module that can also test 50GE, 40GE, 25GE and 10GE

software

2-port 100GE test module
The LokI-100G-5S-2P is a 2 port 100GE test module that can also test these Ethernet network speeds: 50GE, 40GE, 25GE and 10GE. This unique flexibility is provided via two physical transceiver cages, both supporting QSFP28 and QSFP+ transceivers. Both cages can be active simultaneously. This module is exclusively available in the Val-C12-2400G chassis.

The result is a highly versatile solution for performance and functional testing of network infrastructure and Ethernet equipment capable of supporting 100GE such as switches, routers, NICs, taps, packet-brokers, and backhaul platforms.

Specifications

PORT LEVEL FEATURES

  1. Interface category

    QSFP28: 100G, 50G, 40G*, 25G, and 10G* Ethernet
    QSFP+: 40G and 10G Ethernet

    *Depending on transceiver capabilities

  2. Number of test ports (software configurable)

    2x100GE, 4x50GE, 2x50GE PAM4, 2x40GE, 8x25GE, and 8x10GE

  3. Interface options

    1 x 100GBASE-SR4/LR4/CR4 (as per 802.3bj), or
    2 x 50GBASE-SR2/LR2/CR2 (as per Consortium), or
    1 x 50GBASE-SR/CR (PAM4) (as per 802.3cd), or
    1 x 40GBASE-SR4/LR4/CR4 (as per 802.3ba), or
    4 x 25GBASE-SR/LR/CR (as per 802.3by/Consortium), or
    4 x 10GBASE-SR/LR/CR (as per 02.3ae)

    Actual interface options depend on the capabilities of the inserted transceiver.
    Both cages must run with the same base interface configuration (e.g. 2 x 100GE)
    ** As defined by 25/50 GigabitEthernet Consortium

  4. Forward Error Correction (FEC)

    RS-FEC (Reed Solomon) FEC, IEEE 802.3 Clause 91 (100GE)
    RS-FEC (Reed Solomon) FEC, IEEE 802.3 Clause 134 (50GE PAM4)
    RS-FEC (Reed Solomon) FEC, IEEE 802.3 Clause 108 (25GE)
    RS-FEC (Reed Solomon) FEC, 25/50G Ethernet Consortium (25/50GE)
    BASE-R (Fire code) FEC, IEEE 802.3 Clause 74 (10/40/25/50/100GE)

  5. Number of transceiver module cages

    2 x QSFP28/QSFP+

  6. Port statistics (2)

    Link state, FCS errors, pause frames, ARP/PING, error injections, training packet
    All traffic: RX and TX Mbit/s, packets/s, packets, bytes
    Traffic w/o test payload: RX and TX Mbit/s, packets/s, packets, bytes

  7. Adjustable Inter Frame Gap (IFG)

    Configurable from 16 to 56 bytes, default is 20B (12B IFG + 8B preamble)

  8. Transmit line rate adjustment

    Ability to adjust the effective line rate by forcing idle gaps equivalent to -1000 ppm (increments of 10 ppm)

  9. Transmit line clock adjustment

    From -400 to 400 ppm in steps of 0.001 ppm (shared across all ports)

  10. ARP/PING

    Supported (configurable IP and MAC address per port)

  11. Field upgradeable

    System is fully field upgradeable to product releases (FPGA images and Software)

  12. Histogram statistics (2)

    Two real-time histograms per port. Each histogram can measure one of RX/TX packet length, IFG, jitter, or latency distribution for all traffic, a specific stream, or a filter.

  13. Tx disable

    Enable/disable of optical laser or copper link

  14. IGMPv2 multicast join/leave

    IGMPv2 continuous multicast join, with configurable repeat interval

  15. Loopback modes

    • L1RX2TX – RX-to-TX, transmit byte-by-byte copy of the incoming packet
    • L2RX2TX – RX-to-TX, swap source and destination MAC addresses (1)
    • L3RX2TX – RX-to-TX, swap source and destination MAC addresses and IP addresses (1)
    • TXON2RX – TX-to-RX, packet is also transmitted from the port
    • TXOFF2RX – TX-to-RX, port’s transmitter is idle
    • Port-to-port – Inline loop mode where all traffic is looped 100% transparent at L1

  16. Oscillator characteristics

    • Initial Accuracy is 3 ppm
    • Frequency drift over 1st year: +/- 3 ppm (over 15 years: +/- 15 ppm)
    • Temperature Stability: +/- 20 ppm (Total Stability is +/- 35 ppm)

100/40 GE PRBS & PCS LAYERS

  1. Payload Test pattern

    PRBS 2^31

  2. Error Injection

    Manual single shot bit-errors or bursts, automatic continuous error injection

  3. Frame size and header

    Fixed size from 56 to 9200 bytes, any layer 2/3/4 frame header

  4. Alarms

    Pattern loss, bit-error rate threshold

  5. Error analysis

    bit-errors: seconds, count, rate
    mismatch ‘0’ / ‘1’: seconds, count, rate
    logging and analysis of bit-error event timing

  6. PCS virtual lane configuration

    User defined skew insertion per Tx virtual lane, and user defined virtual lane to SerDes mapping for testing of the Rx PCS virtual lane re-order function.

  7. PCS virtual lane statistics

    Relative virtual lane skew measurement (up to 2048 bits), sync header and PCS lane marker error counters, indicators for loss of sync header and lane marker, BIP8 errors

TRANSMIT ENGINE

  1. Number of transmit streams per port

    256 (wire-speed) continuous. Each stream can generate millions of traffic flows through the use of field modifiers.

  2. Test payload insertion per stream

    Wire-speed packet generation with timestamps, sequence numbers, and data integrity signature optionally inserted into each packet.

  3. Stream statistics (2)

    TX Mbit/s, packets/s, packets, bytes, FCS error, Pause

  4. Bandwidth profiles

    Burst size and density can be specified. Uniform and bursty bandwidth profile streams can be interleaved

  5. Field modifiers

    16-bit header field modifiers with inc, dec, or random mode. Each modifier has configurable bit-mask, repetition, min, max, and step parameters. 8 modifiers per stream.

  6. Packet length controls

    Fixed, random, butterfly, and incrementing packet length distributions. Packet length from 56 to 12288 bytes

  7. Packet payloads

    Repeated user specified 1 to 18B pattern, an 8-bit incrementing pattern

  8. Error generation

    Undersize length (56 bytes min.) and oversize length (12288 bytes max.) packet lengths, injection of sequence, misorder, payload integrity, and FCS errors

  9. TX packet header support and RX autodecodes

    Ethernet, Ethernet II, VLAN, ARP, IPv4, IPv6, UDP, TCP, LLC, SNAP, GTP, ICMP, RTP, RTCP, STP, MPLS, PBB, or fully specified by user

  10. Packet scheduling modes

    • Normal (stream interleaved mode). Standard scheduling mode, precise rates, minor variation in packet inter-frame gap.
    • Strict Uniform. New scheduling mode, with 100% uniform packet inter-frame gap, minor deviation from configured rates.
    • Sequential packet scheduling (sequential stream scheduling). Streams are scheduled continuously in sequential order, with configurable number of packets per stream.
    • Burst. Up to 10000 packets per stream are organized in bursts. Bursts from active streams form a burst group. The user specifies time from start of one burst group till start of next burst group

RECEIVE ENGINE

  1. Number of traceable Rx streams per port

    2016 (wire-speed)

  2. Automatic detection of test payload for received packets

    Real-time reporting of statistics and latency, loss, payload integrity, sequence error, and misorder error checking

  3. Jitter measurement

    Jitter (Packet Delay Variation) measurements compliant to MEF10 standard with 8 ns accuracy. Jitter can be measured on up to 32 streams.

  4. Stream statistics (2)

    • RX Mbit/s, packets/s, packets, bytes.
    • Loss, payload integrity errors, sequence errors, misorder errors
    • Min latency, max latency, average latency
    • Min jitter, max jitter, average jitter

  5. Latency measurements accuracy

    ±16 ns (opto/elec).

  6. Latency measurement resolution

    8 ns (Latency measurements can calibrate and remove latency from transceiver modules)

  7. Number of filters:

    • 4 x 64-bit user-definable match-term patterns with mask, and offset
    • 4 x frame length comparator terms (longer, shorter)
    • 4 x user-defined filters expressed from AND/OR’ing of the match and length terms.

  8. Filter statistics (2)

    Per filter: RX Mbit/s, packets/s, packets, bytes.

CAPTURE

  1. Capture criteria

    All traffic, stream, FCS errors, filter match, or traffic without test payloads

  2. Capture start/stop triggers

    Capture start and stop trigger: none, FCS error, filter match

  3. Capture limit per packet

    16 – 12288 bytes

  4. Wire-speed capture buffer per port

    256 kB for 100G
    128 kB for 40G

  5. Low speed capture buffer per port (10Mbit/sec)

    4096 packets (any size)

ADVANCED PHY FEATURES

  1. Transmit Equalization Controls

    – Tx Transmit Equalization Controls Pre-emphasis
    – Tx Attenuation
    – Tx Post-emphasis Signal Integrity Analysis Graphical “eye” diagram
    – Rx Optional Auto-Tune of PHY 25Gbps Rx SerDes

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