Terabit Ethernet

Terabit Ethernet – when and why?

Ethernet remains the backbone of data center networking, now advancing toward 1.6Tbps—doubling the 800Gbps standard ratified by IEEE in 2024. This leap is powered by eight lanes of 224Gbps SerDes, compared to 112Gbps per lane in 800G. The same 224Gbps lanes also enable 200G, 400G, and 800G configurations using 1, 2, or 4 lanes.

According to Dell’Oro Group, the pace of migration from 800Gbps to 1600Gbps will be nearly twice as fast as what we have typically observed in traditional front-end networks connecting general-purpose servers. And before the end of the decade we will likely be working on 3.2Tbps using 448G SerDes.

At these speeds, signal integrity becomes paramount. Higher frequencies amplify conductor and dielectric losses, while discontinuities like vias and connectors introduce impedance mismatches, reflections, and EMI. Intersymbol interference (ISI) also increases, complicating signal recovery. These challenges require advanced modulation, equalization, error correction, and meticulous physical design.

The 1.6T Ethernet standard, under IEEE 802.3dj, builds on 400G and 800G technologies like PAM4 modulation but introduces key innovations in FEC, PCS lane structures, and equalization. The OIF is also defining the 224G SerDes (OIF-CEI-224G), a foundational component for Ethernet and other protocols.

The Ultra Ethernet Consortium complements these efforts by aligning industry stakeholders around a common vision for high-performance Ethernet. UEC is driving interoperability, architecture, and ecosystem development to ensure 1.6T Ethernet meets the demands of AI, HPC, and next-gen data centers. Teledyne LeCroy joined the UEC to contribute to the development of a next-generation Ethernet stack characterized by ultra-low latency, high reliability, and in-order delivery, while maintaining Ethernet’s scalability and flexibility.

What is the difference between 800GE and 1.6TE?

The main difference between 800Gbps Ethernet using 112G SerDes and 1.6Tbps Ethernet using 224G SerDes lies in the doubling of per-lane speed and architectural enhancements to support higher data rates, improved signal integrity, and more efficient error correction.

1. SerDes Speed and Lane Count

• 800Gbps Ethernet (e.g., IEEE 802.3df) uses 8 lanes of 112Gbps SerDes.
• 1.6Tbps Ethernet (IEEE 802.3dj) uses 8 lanes of 224Gbps SerDes.
• This doubling of per-lane speed enables 1.6T Ethernet to achieve twice the throughput using the same number of lanes, reducing complexity and power consumption per bit.

2. Modulation Format

• Both standards use PAM4 (4-level Pulse Amplitude Modulation) to double the bits per symbol compared to NRZ.
• The same Gray coding and pre-coding techniques are used in both 112G and 224G SerDes to minimize bit errors.

3. Forward Error Correction (FEC)

Both use (544, 514, 15) Reed-Solomon FEC, but:

• 800G uses bit multiplexing, which spreads burst errors across multiple symbols, making them harder to correct.
• 1.6T uses symbol multiplexing, which contains burst errors within fewer symbols, improving FEC effectiveness.
• Additionally, 1.6T Ethernet introduces concatenated FEC with an inner Hamming code for optical links, enhancing error correction further.

4. PCS Lane Configuration

• 800G Ethernet uses 32 virtual PCS lanes at 25Gbps.
• 1.6T Ethernet uses 16 virtual PCS lanes at 100Gbps, simplifying lane management and reducing latency.

5. Equalization and Signal Integrity

• Both standards use equalizers (FFE, CTLE, DFE) to combat signal degradation.
• 224G SerDes requires more advanced equalization due to higher frequency losses and increased inter-symbol interference (ISI).

6. DSP and ADC Enhancements

• 224G SerDes pushes the limits of current silicon, requiring time-interleaved ADCs and DSP-based clock recovery to handle the higher data rates.
• These enhancements ensure reliable signal processing despite narrower eye openings and increased jitter.

Get up to speed on 1.6Tbps Ethernet

This White Paper explores how the shift to 224G SerDes enables 1.6Tbps Ethernet, and what it means for signal integrity, modulation formats, FEC, equalization, and transceiver design.

Whether you’re designing silicon, testing active cables, or deploying next-gen data center infrastructure, this White Paper provides the insights and practical test strategies you need to stay ahead.