Z100q Loki

The Z100q Loki is a 2-port 100GE dual-media test module that can also test 50GE, 40GE, 25GE and 10GE

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2-port 100GE test module
The Z100q Loki is a 2 port 100GE test module that can also test these Ethernet network speeds: 50GE, 40GE, 25GE and 10GE. This flexibility is provided via two physical transceiver cages, both supporting QSFP28 and QSFP+ transceivers. Both cages can be active simultaneously. This module is exclusively available in the Xena B2400 chassis.

The result is a highly versatile solution for performance and functional testing of network infrastructure and Ethernet equipment capable of supporting 100GE such as switches, routers, NICs, taps, packet-brokers, and backhaul platforms.

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Specifications

PORT LEVEL FEATURES

Interface category

QSFP28: 100G, 50G, 40G*, 25G, and 10G* Ethernet
QSFP+: 40G and 10G Ethernet

*Depending on transceiver capabilities

Number of test ports (software configurable)

2x100GE, 4x50GE, 2x50GE PAM4, 2x40GE, 8x25GE, and 8x10GE

Interface options

1 x 100GBASE-SR4/LR4/CR4 (as per 802.3bj), or
2 x 50GBASE-SR2/LR2/CR2 (as per Consortium**), or
1 x 50GBASE-SR/CR (PAM4) (as per 802.3cd), or
1 x 40GBASE-SR4/LR4/CR4 (as per 802.3ba), or
4 x 25GBASE-SR/LR/CR (as per 802.3by/Consortium**), or
4 x 10GBASE-SR/LR/CR (as per 802.3ae)

Actual interface options depend on the capabilities of the inserted transceiver.
Both cages must run with the same base interface configuration (e.g. 2 x 100GE)
** As defined by Ethernet Technology Consortium

Forward Error Correction (FEC)

RS-FEC (Reed Solomon) 528,514,t=7, IEEE 802.3 Clause 91 (100GE)
RS-FEC (Reed Solomon) 544,514,t=15, IEEE 802.3 Clause 134 (50GE PAM4)
RS-FEC (Reed Solomon) 528,514,t=7, IEEE 802.3 Clause 108 (25GE)
RS-FEC (Reed Solomon) 528,514,t=7, 25/50G Ethernet Consortium (25/50GE)
BASE-R FEC (Firecode) 2112,2080 IEEE 802.3 Clause 74 (25GE, 10GE)

Number of transceiver module cages

2 x QSFP28/QSFP+

Port statistics ⁽²⁾

Link state, FCS errors, pause frames, ARP/PING, error injections, training packet
All traffic: RX and TX Mbit/s, packets/s, packets, bytes
Traffic w/o test payload: RX and TX Mbit/s, packets/s, packets, bytes

Adjustable Inter Frame Gap (IFG)

Configurable from 16 to 56 bytes, default is 20B (12B IFG + 8B preamble)

Transmit line rate adjustment

Ability to adjust the effective line rate by forcing idle gaps equivalent to -1000 ppm (increments of 10 ppm)

Transmit line clock adjustment

From -400 to 400 ppm in steps of 0.001 ppm (shared across all ports)

ARP/PING

Supported (configurable IP and MAC address per port)

Field upgradeable

System is fully field upgradeable to product releases (FPGA images and Software)

Histogram statistics ⁽²⁾

Two real-time histograms per port. Each histogram can measure one of RX/TX packet length, IFG, jitter, or latency distribution for all traffic, a specific stream, or a filter.

Tx disable

Enable/disable of optical laser or copper link

IGMPv2 multicast join/leave

IGMPv2 continuous multicast join, with configurable repeat interval

Loopback modes

• L1RX2TX – RX-to-TX, transmit byte-by-byte copy of the incoming packet
• L2RX2TX – RX-to-TX, swap source and destination MAC addresses ⁽¹⁾
• L3RX2TX – RX-to-TX, swap source and destination MAC addresses and IP addresses ⁽¹⁾
• TXON2RX – TX-to-RX, packet is also transmitted from the port
• TXOFF2RX – TX-to-RX, port’s transmitter is idle
• Port-to-port – Inline loop mode where all traffic is looped 100% transparent at L1

Oscillator characteristics

• Initial Accuracy is 3 ppm
• Frequency drift over 1st year: +/- 3 ppm (over 15 years: +/- 15 ppm)
• Temperature Stability: +/- 20 ppm (Total Stability is +/- 35 ppm)

100/50/40/25GE/10G PCS/PMA LAYERS

Payload Test Pattern

PRBS-31

Error Injection

Manual single shot bit-errors or bursts

PCS virtual lane configuration

User-defined skew insertion per Tx virtual lane, and user defined virtual lane to SerDes mapping for testing of the Rx PCS virtual lane re-order function.

PCS virtual lane statistics

Relative virtual lane skew measurement (up to 2048 bits)

FEC Total Statistics

NRZ: Total corrected FEC symbols, Total uncorrected FEC symbols, Estimated Pre-FEC BER, Estimated Post-FEC BER, Pre-FEC Error Distribution Graph

Link Flap

Single short or repeatable link down events with ms precision

Error Injection (PMA Layer)

Repeatable error inject periods at PMA layer with ms precision

TRANSMIT ENGINES

Number of transmit streams per port

256 (wire-speed) continuous. Each stream can generate millions of traffic flows through the use of field modifiers.

Test payload insertion per stream

Wire-speed packet generation with timestamps, sequence numbers, and data integrity signature optionally inserted into each packet.

Stream statistics ⁽¹⁾

TX Mbit/s, packets/s, packets, bytes, FCS error

Bandwidth profiles

Burst size and density can be specified. Uniform and bursty bandwidth profile streams can be interleaved

Field modifiers

16-bit or 32-bit header field modifiers with inc, dec, or random mode. Each modifier has configurable bit-mask, repetition, min, max, and step parameters. 8 16-bit modifiers per stream or 4 32-bit modifiers per stream.

Packet length controls

Fixed, random, butterfly, and incrementing packet length distributions. Packet length from 60 to 12288 bytes

Packet payloads

Repeated user specified 1 to 18B pattern, an 8-bit incrementing pattern

Extended payload

Fixed full custom payloads can be generated for each stream with payload sizes up to 12288 bytes

Error generation

Undersize length (60 bytes min. / at 10G 56 byte min.) and oversize length (12288 bytes max.) packet lengths, injection of sequence, misorder, payload integrity, and FCS errors

TX packet header support and RX autodecodes

Ethernet, Ethernet II, VLAN, ARP, IPv4, IPv6, UDP, TCP, LLC, SNAP, GTP, ICMP, RTP, RTCP, STP, MPLS, PBB, or fully specified by user

Pause Frames

Responds to incoming pause and PFC (Priority-based Flow Control) frames

Packet scheduling modes

• Normal (stream interleaved mode). Standard scheduling mode, precise rates, minor variation in packet inter-frame gap.
• Strict Uniform. New scheduling mode, with 100% uniform packet inter-frame gap, minor deviation from configured rates.
• Sequential packet scheduling (sequential stream scheduling). Streams are scheduled continuously in sequential order, with configurable number of packets per stream.
• Burst. Up to 10000 packets per stream are organized in bursts. Bursts from active streams form a burst group. The user specifies time from start of one burst group till start of next burst group

RECEIVE ENGINE

Number of traceable Rx streams per port

2016 (wire-speed)

Automatic detection of test payload for received packets

Real-time reporting of statistics and latency, loss, payload integrity, sequence error, and misorder error checking

Jitter measurement

Jitter (Packet Delay Variation) measurements compliant to MEF10 standard with 8 ns accuracy. Jitter can be measured on up to 32 streams.

Stream statistics ⁽²⁾

• RX Mbit/s, packets/s, packets, bytes.
• Loss, payload integrity errors, sequence errors, misorder errors
• Min latency, max latency, average latency
• Min jitter, max jitter, average jitter

Latency measurements accuracy

±16 ns (opto/elec).

Latency measurement resolution

8 ns (Latency measurements can calibrate and remove latency from transceiver modules)

Number of filters:

• 6 x 64-bit user-definable match-term patterns with mask, and offset
• 6 x frame length comparator terms (longer, shorter)
• 6 x user-defined filters expressed from AND/OR’ing of the match and length terms.

Filter statistics ⁽²⁾

Per filter: RX Mbit/s, packets/s, packets, bytes.

CAPTURE

Capture criteria

All traffic, stream, FCS errors, filter match, or traffic without test payloads

Capture start/stop triggers

Capture start and stop trigger: none, FCS error, filter match

Capture limit per packet

16 – 12288 bytes

Wire-speed capture buffer per port

256 kB for 100G
128 kB for 40G

Low speed capture buffer per port (10Mbit/sec)

4096 packets (any size)

ADVANCED PHY FEATURES

Transmit Equalization Controls

– Tx Transmit Equalization Controls Pre-emphasis
– Tx Attenuation
– Tx Post-emphasis Signal Integrity Analysis Graphical “eye” diagram
– Rx Optional Auto-Tune of PHY 25Gbps Rx SerDes

Technical Documentation