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The Freya Z800qac is the industry's first dedicated 112G SerDes Auto-Negotiation & Link Training (AN/LT) test solution
The Z800qac Freya is designed specifically for Ethernet AN/LT testing at 56G/112G PAM4 SerDes speeds.
Ideally Auto-Negotiation & Link Training are initiated automatically, and the two devices run through the different states in the protocols to negotiate speed and tune to optimal settings. However not all endpoints behave the same and interpretations and implementations of the standards varies. Also, the quality of the AN/LT training results are not always consistent which can lead to erratic link stability.
The Z800qac Freya allows thorough testing of the endpoint behavior. It provides insight, visibility, and configuration possibilities to the AN and LT process making it easy to analyze DUT behavior during AN/LT, and configure and optimize the relevant AN parameters and LT coefficients.
Leveraging our award-winning Freya 800G test modules, the Z800qac Freya is a small 1U “desktop” tester that is easy to transport from site to site in a 19” flight case. In addition to this QSFP- DD version, there is also a OSFP version called the Z800oac Freya.
The advanced AN/LT test capabilities can also be enabled on “standard” Freya modules using a dedicated AN/LT Test Appliance license “Freya 800 AN/LT SW Lic”.
Layer 1 Test Tools
The Z800qac includes XenaManager, Xena’s user-friendly management software which supports the same L1 features as the Freya test modules incl.: PRBS, single stream TGA for PHY/PCS testing, Advanced PMA and PCS/FEC Error Injection, lane skewing & swapping, and ppm sweeping.
AN/LT Testing
Also included is the Xena OpenAutomation (XOA) AN/LT Test Utility and the AN/LT Protocol Test Suite for performance and conformance testing.
The Xena OpenAutomation (XOA) AN/LT Test Utility is a command line tool for Interactive AN/LT Protocol Testing with single stepping of the LT protocol towards the DUT while providing statistics and logging.
The Xena OpenAutomation (XOA) AN/LT Test Suite is designed for performance and compliance testing. It can be orchestrated from third party analyzers or automation systems through its REST API or run as a stand-alone application together with the XOA AN/LT Test Suite Application.
QSFP-DD800 – 800G, 400G, 200G, 100G, 50G Ethernet
QSFP112 – 400G, 200G, 100G Ethernet
QSFP-DD800 cage
112G SerDes:
• 1 x 800GE PAM4 IEEE 802.3df (D2.0) / Ethernet Technology Consortium or
• 2 or 1 x 400GE PAM4 802.3ck or
• 4 or 2 x 200GE PAM4 802.3ck or
• 8 or 4 x 100GE PAM4 802.3ck
56G SerDes:
• 1 x 400GE PAM4 802.3bs or
• 2 x 200GE PAM4 802.3cd or
• 4 x 100GE PAM4 802.3cd or
• 8 x 50GE PAM4 802.3cd
QSFP112 cage
112G SerDes:
• 1 x 400GE PAM4 802.3ck or
• 2 x 200GE PAM4 802.3ck or
• 4 x 100GE PAM4 802.3ck
Both cages must run with the same interface configuration (e.g. 4 x 100G) and same SerDes speed (e.g 112G)
Power capacity using single cage: QSFP-DD800: 25W or QSFP112: 15W
Power capacity using both cages: QSFP-DD800: 15W + QSFP112: 15W
RS-FEC (Reed Solomon) (544,514,t=15), IEEE 802.3 Clause 119, Clause 134
Link state, FCS errors, error injections, RX and TX Mbit/s, packets/s, packets, bytes
Configurable from 16 to 56 bytes, default is 20B (12B IFG + 8B preamble)
Ability to adjust the effective line rate by forcing idle gaps equivalent to -1000 ppm (increments of 10 ppm)
From -400 to 400 ppm in steps of 1 ppm
Configurable linear or step sweep +/- 400 ppm
System is fully field upgradeable to product releases (FPGA images and software)
PRBS-31
PRBS pattern loss, link sync loss
Bit-errors: seconds, count, rate
User-defined skew insertion per Tx virtual lane, and user-defined virtual lane to SerDes mapping for testing of the Rx PCS virtual lane re-order function
Relative virtual lane order and relative skew measurements (up to 2048 bits)
Corrected Bit error, Pre-FEC
Total corrected FEC symbols, Total uncorrected FEC symbols, Estimated Pre-FEC BER, Estimated Post-FEC BER, Pre-FEC Error Distribution Graph
Single short or repeatable link down events with ms precision
Repeatable (burst) error inject periods at PMA layer with ms precision and configurable BER
Deterministic injection of symbol errors in FEC codewords
Generation of sequences of FEC codewords with deterministic error distribution
Command line tool for Interactive AN/LT Protocol Testing with single step of the LT protocol towards DUT with Xena Open Automation (XOA) AN/LT Test Utility
Can be performed with Xena OpenAutomation (XOA) AN/LT Test Suite, or orchestrated from third party analyzers or automation systems
Tx Transmit Equalization Controls
Auto-Tune or manual control of Rx equalizer (FFE/DFE/CTLE)
1 (wire-speed)
Wire-speed packet generation
TX Mbit/s, packets/s, packets, bytes, FCS error
Burst size and density can be specified. Uniform and bursty bandwidth profile streams can be interleaved.
Fixed, random, butterfly, and incrementing packet length distributions from 56 to 12288 bytes
Repeated user specified 1 to 18B pattern, an 8-bit incrementing pattern
Normal (stream interleaved mode) – standard scheduling mode, precise rates, minor variation in packet inter-frame gap.
1 (wire-speed)
RX Mbit/s, packets/s, packets, bytes
Initial Accuracy is 3 ppm
Frequency drift over 1st year: +/- 3 ppm (over 15 years: +/- 15 ppm)
Temperature Stability: +/- 20 ppm (Total Stability is +/- 35 ppm)
100-240V
50-60Hz
2A with 120V supply, and 1A with 240V supply
220W
16.5 lbs (7.5 kg)
Operating Temperature: 10° to 35° C
Storage Temperature: -40° to 70° C
Humidity: 8% to 90% non-condensing
W: 19” (48.26 cm)
H: 1.75” (4.45 cm)
D: 15” (37 cm)
67.5 dBA
FCC (US), CE (Europe)