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The Z800q Freya Ethernet traffic generator can test 800GE, 400GE, 200GE, 100GE and 50GE using 112G/56G SerDes PAM4 and 100GE, 50GE, 40GE, 25GE and 10GE using 28G/10G SerDes NRZ.
A versatile solution for performance and functional testing of Ethernet network infrastructure and equipment including switches, routers and NICs, the Z800q Freya can test up to 800GE using 112G SerDes (PAM4 112G) and is designed for helping achieve the best possible signal integrity and Bit Error Rate performance.
The Z800q offers extensive L1 test features for advanced PCS and PMA layer testing including dynamic transceiver clock sweep, lane skewing and PRBS modes. Signals can be analyzed in advanced signal integrity view, which provides visual information on the quality of the signal.
The Z800q Freya test module also supports Auto-Negotiation and Link Training (AN/LT) on 112G SerDes and 56G SerDes PAM4.
Z800q Freya modules can be installed in the modular XenaBay B2400 chassis (where they require 2 slots), or in the fixed XenaCompact chassis, making it the most compact and lightweight 800G Ethernet test solution in the market.
XenaManager is included, giving users access to an intuitive user-friendly multi-user management software where they can generate and analyze traffic. Xena OpenAutomation (XOA) enables customers to make the most of Xena testers with tailored tests as well as standardized test methodologies, to achieve accelerated release cycles, enhanced test reliability, and boosted customer satisfaction.
Ethernet Auto-Negotiation & Link Training Test Tools
The AN/LT Utility provides insight, visibility, and configuration possibilities to the AN and LT process making it easy to analyze DUT behavior during AN/LT, configure and optimize the relevant AN parameters and LT coefficients.
Top Features
QSFP-DD800 : 800G, 400G, 200G, 100G, 50G, 40G, 25G & 10G Ethernet
QSFP112 : 400G, 200G, 100G, 50G, 40G, 25G & 10G Ethernet
QSFP-DD800 cage:
112G SerDes Line Code IEEE/ETC*
1 x 800GE PAM4 IEEE 802.3df or ETC* 800G R1.1
2** x 400GE PAM4 802.3ck
4** x 200GE PAM4 802.3ck
8** x 100GE PAM4 802.3ck
56G Serdes
1 x 400GE PAM4 IEEE 802.3bs or ETC* 400G
2** x 200GE PAM4 802.3cd
4** x 100GE PAM4 802.3cd
8** x 50GE PAM4 802.3cd
25G/10G Serdes
2** x 100GE NRZ 802.3ba
4** x 50GE NRZ ETC* 25G/50G R2.0
2** x 40GE NRZ 802.3ba
8** x 25GE NRZ IEEE 802.3by or ETC* 25G/50G R2.0
8** x 10GE NRZ 802.3ae
Power capacity using single cage:
OSFP or QSFP-DD800: 25W or QSFP112: 15W
Power capacity using both cages:
QSFP-DD800: 15W + QSFP112: 15W
* ETC = Ethernet Technology Consortium
** QSFP-DD module offers the option to provide connectivity in both 2 cages. If any of those modes is selected, the same interface configuration will be on all ports,- furthermore the ports will be shared across the 2 cages.
For instance if the QSFP112 mode with 8 x 100G is chosen, 4 ports will be
available in QSFP-DD cage and 4 ports will be available in the QSFP112 cage.
PRBS-13Q, PRBS-31Q, SSPRQ test pattern (IEEE 802.3 Clause 120.5.11.2.3) and Square Wave (IEEE 802.3 Clause 120.5.11.2.4).
PCS virtual lane-to-SerDes mapping configuration
BASE-R FEC (Firecode) (2112,2080), IEEE 802.3 Clause 74 (25GE, 10GE)
RS-FEC KR (528, 514, t=7), IEEE 802.3 Clause 91 (100GE)
RS-FEC KR (528, 514, t=7), IEEE 802.3 Clause 108 (25GE)
RS-FEC KR (528, 514, t=7), 25/50G Ethernet Consortium (25/50GE)
RS-FEC KP (544,514,t=15), IEEE802.3 Clause 119
RS-FEC KP (544,514,t=15), IEEE802.3 Clause 134
RS-FEC Int KP (544,514,t=15), IEEE802.3 Clause 161 (100G)
RS-FEC KP (544, 514, T=15) (excluding RS-FEC Int KP)
RS-FEC KR (528, 514, T=7)
Configuration: Consecutive, Errored Codewords, Total Codewords Per Cycle,
Errored Symbols Per Codeword
Bit error mask modes: Static, Rotate, Increment
Pre-defined profiles: Max. Consecutive Uncorrectable w/o Link Loss, Min.
Consecutive Uncorrectable with Link Loss
Loop modes: Single, Continuous, Repeat
Injection statistics: Injected FEC Errors; Total Codewords, Total Uncorrectable
Codewords, Total Correctable Codewords, Total Error-Free Codewords,
Codeword Error Ratio, and Total Symbol Errors
Normal: Acts according to 802.3 standard
Force Local: Port will continuously transmit “Local Fault indication”.
Force Remote: Port will continuously transmit “Remote Fault indication”
Disabled: Port does not respond to Local/Remote Fault from DUT
Repeatable error injection periods at PMA layer with millisecond precision.
Single shot or repeatable link-down with millisecond precision.
Tx Equalization Control
Rx Equalization Control: CTLE, AGC Adapt, OC Adapt, DFE Tap, CDR, Pre
FFEs, and Post FFEs
Support value freezing and auto on Rx equalizations
Advanced Signal Integrity View for modulated signal quality analysis
Configurable
linear or step sweep +/- 400 ppm in steps of 1ppm (shared across all ports on
module)
Auto-negotiation: IEEE 802.3 Clause 73, ETC 400G/800G & ETC 25G/50G
Link training: IEEE 802.3 Clause 72, 136 and 161
Capture, Decode and analysis of Auto Negotiation and Link Training protocol
Wire-speed multi-stream traffic generation
Up to 256 hardware streams per port
Each stream can generate millions of traffic flows using field modifier
From -400 to 400 ppm in steps of 1 ppm (shared across all ports on module)
Initial Accuracy is +/- 1,5 ppm including temperature Stability.
Frequency drift over 1st year: +/- 2.5 ppm including temperature Stability.
Frequency drift over over 20 years: +/- 3.5 ppm including temperature Stability.
Temperature Stability mentioned above is +/- 0.5 ppm
Support adjustment of the effective line rate by forcing idle gaps equivalent to -1000
ppm (increments of 10 ppm)
Configurable Inter-Frame Gap (IFG) from 16 to 63 bytes, default is 20B (12B IFG +
8B preamble)
Support optical laser or copper link enable/disable
L1 RX-to-TX: Any received packet is bounced back through TX
TX(on)-to-RX: Packet goes out of TX but also internally direct to RX
TX(off)-to-RX: Packet goes directly to RX (No link sync needed)
Port-to-Port: Any received packet goes out through the neighbor port
Normal (stream interleaved mode): Default scheduling mode, precise rates, minor
variation in packet inter-frame gap.
Uniform: With 100% uniform packet inter-frame gap, minor deviation from configured
rates is available.
Sequential: Streams are scheduled continuously in sequential order, with
configurable number of packets per stream.
Burst: Packets in a stream are organized in bursts. Bursts from active streams form
a burst group is available. The user specifies time from start of one burst group till
start of next burst group.
Packet Length: Fixed; Incrementing, Random, Butterfly. Minumum 56 bytes,
maximum 16K bytes.
Packet Payload: Incrementing 8-bit, custom pattern (up to 18B repeated)
Burst Traffic with configurable Burst Size, and Burst Density
Flow Control: PFC support for both VLAN tagged and untagged traffic
Ethernet, VLAN, ARP, IPv4, IPv6, UDP, TCP, LLC, SNAP, GTP, ICMP, RTP, RTCP,
STP, SCTP, MacCtrl, MPLS, PBB, FCoE, FC, IGMPv2, GRE, GTP, VxLAN, NVGRE,
DHCPv4, Geneve, eCPRI, RoE, PWE, PFC, Custom.
Maximum 8 x 24-bit modifiers per stream
24-bit header field modifiers with incremental, decremental, or random mode.
Each modifier has configurable bit-mask, repetition, min, max, and step parameters.
Undersize (56 bytes min), and oversize (12288 bytes max.) packet lengths
FCS Error, Sequence Error, Misordering Error, Payload Integrity Error, Test Payload
Error
Support for IPv4
Up to 8 multicast group addresses
IGMPv2: Join (with configurable repeat interval), Leave All-Devices, Leave, General
Query, Group Query
IGMPv3: Exclude (with configurable repeat interval), Include, Change-to-Exclude,
Change-to-Include, Multi-group record support
Auto address resolution
Auto reply to request per port and per stream
Configurable LLDP operation mode, timers, and TLVs
Support mandatory and optional TLV types
Display received LLDP information
Per-stream: bits/s, bytes/s, packets/s, packets, bytes
Per-port: ARP, NDP, Ping, requests and replies
Per-port injected errors: FCS Error, Sequence Error, Misordering Error, Payload
Integrity Error, Test Payload Error
Two real-time histograms per port: TX Packet Length, IFG, or latency distribution for
all traffic, a specific stream, or a filter
Normal (stream interleaved mode) – standard scheduling mode, precise rates, minor
variation in packet inter-frame gap.
Strict Uniform – with 100% uniform packet inter-frame gap, minor deviation from
configured rates is available.
Sequential packet scheduling (sequential stream scheduling) is available. Streams
are scheduled continuously in sequential order, with configurable number of packets
per stream.
Burst. Packets in a stream are organized in bursts. Bursts from active streams form
a burst group is available. The user specifies time from start of one burst group till
start of next burst group.
Number of Traceable Rx Streams Per Port : 2016 (wire-speed)
Per-stream: bits/s, bytes/s, packets/s, packets, bytes
Per-stream: Packet Loss, Misordered, Payload Errors
Per-stream: Latency and jitter with minimum, maximum and average
Per-port: ARP, NDP, Ping, with requests and replies
Per-port injected errors: FCS Error, Sequence Error, Misordering Error, Payload
Integrity Error, Test Payload Error
Two real-time histograms per port: RX Packet Length, IFG, or latency distribution
for all traffic, a specific stream, or a filter
Filter statistics: bits/s, bytes/s, packets/s, packets, bytes
Latency can be measured on up to 256 streams
Accuracy: ±16 ns
Resolution: 1 ns
(Latency measurements can be calibrated to remove latency from transceiver
modules)
Measurement modes: Last-to-last, last-to-first, first-to-last, first-to-first
6 x 64-bit configurable match-term patterns with mask, and offset
6 x frame length comparator terms (longer, shorter)
6 x configurable filters expressed in logical expressions of the match and length
terms
Per filter:
RX Mbit/s
packets/s
packets
bytes
Start Trigger Criteria: FCS errors, filter match, payload error, manual
Stop Trigger Criteria: FCS errors, filter match, payload error, manual, buffer full
Capture Limit Per Packet: 16 – 16383 bytes
Wire-Speed Capture Buffer Per Port: 64 kB
Low Speed Capture Buffer Per Port (10 Mbits/s): 4096 packets (any size)
Packet header auto decode
Number Of Traceable Rx Streams Per Port: 2016 (wire-speed)
Per-stream: bits/s, bytes/s, packets/s, packets, bytes
Per-stream: Packet Loss, Misordered, Payload Errors
Per-stream: Latency and jitter with minimum, maximum and average
Per-port: ARP, NDP, Ping, with requests and replies
Per-port injected errors: FCS Error, Sequence Error, Misordering Error, Payload
Integrity Error, Test Payload Error
Two real-time histograms per port: RX Packet Length, IFG, or latency distribution
for all traffic, a specific stream, or a filter
Filter statistics: bits/s, bytes/s, packets/s, packets, bytes
Accuracy: ±16 ns
Resolution: 1 ns
(Latency measurements can be calibrated and remove latency from transceiver
modules)
Measurement modes: Last-to-last, last-to-first, first-to-last, first-to-first
Jitter can be measured on up to 256 streams
Jitter (Packet Delay Variation) measurements compliant to MEF10 standard with
1ns accuracy.
6 x 64-bit configurable match-term patterns with mask, and offset
6 x frame length comparator terms (longer, shorter)
6 x configurable filters expressed in logical expressions of the match and length
terms
Per filter:
RX Mbit/s
packets/s
packets
bytes
Start Trigger Criteria: FCS errors, filter match, payload error, manual
Stop Trigger Criteria: FCS errors, filter match, payload error, manual, buffer full
Capture Limit Per Packet: 16 – 16383 bytes
Wire-Speed Capture Buffer Per Port: 64 kB
Low Speed Capture Buffer Per Port (10 Mbits/s): 4096 packets (any size)
Packet header auto decode
2.32 lbs (1.05 kg)
Operating Temperature: 10 to 35º C
Storage Temperature: -40 to 70º C
Humidity: 8% to 90% non-condensing
FCC (US)
CE (Europe)
Xena uses high-quality 112Gbps-capable electrical connectors on Z800 Freya
modules for optimal signal integrity and performance. However, all connectors
experience wear when inserted, resulting in decreased signal integrity over time. The
specification below is the minimum number of insertions where optimal signal
integrity is guaranteed:
Connectors, minimum number of guaranteed insertions: 1000 cycles
The Z800q and Z8000 Freya occupies 2 slot in a B2400 chassis. Up to 6 pcs. of
Z800q and/or Z800o Freya can be installed in a single B2400 chassis. Please
refer to module install guide line for additional info.
The Z800q and Z800o Freya modules are also available in the standalone
Compact chassis (P/N Z800qc Freya or Z800oc Freya)